Electrical and Computer Engineering

I used to get paid to design FPGA logic but don't anymore.

You can think of Verilog as a level up from Spice. Spice is basically a list of components and connections. Verilog is an actual programming language, but the goal of the language is to model synchronous digital logic - gates and flip-flops. Having a good understanding of where the clocks are in your system is essential.

Most FPGA boards have a known clock frequency that comes in on a particular pin, which then may go to a PLL, and then to a global clock buffer network. That network is designed to deliver that clock signal in a uniform fashion to every part of the chip. So, since basic designs will only run on one clock, the tools will put your logic in an acceptable place for all the logic to work properly. You shouldn't need to manually move stuff at all. If the design isn't doing what you want, you may need to change your Verilog (or your clock constraints).

You generally can't hurt your board by loading the wrong program onto it. The software will alert you if your design is too big, and refuse to load it. You can hurt your board if you are using external signals, and dont pay attention to where your inputs and output pins are. It is helpful to read the manual (or better yet, the schematic) so you know where to properly hook up these external signals.

Good luck!

It's been a decade plus since I touched that stuff. (I worked with Xilinx and Altera FPGAs for a couple of digital logic classes back in college as a CS undergrad.) My memory of writing Verilog is a lot of dealing with the manufacturer's clunky IDEs to type in code, compile it to something that could be either simulated or loaded on the device, and a bunch of poking around at waveform diagrams in the software to try to debug my mistakes. I did not have a very good grasp on the physical structure of the FPGAs we were using, but was still able to program the devices successfully in a class. We did need to specify information about particular pins that we needed our logic to hook up to correctly. The compiler did the hard work of figuring out what actually needed to go where (and consequently ensuring a bunch of constraints implied by the logic are actually met about signal propagation timing). I'd expect the compiler to bitch at you if you ask it to try to synthesize something that ends up being too big to fit onto your target.

Contemporary Logic Design by Katz and Borriello was the textbook we used.

I have a board around somewhere, an ice40 I think. I never did figure out the open source tool chain. At one point I was messing with CPLDs, I think it was the max 240 chip, but just following tutorials with altera's software. That was too long ago to be any help at all. I don't even remember the website, but there are places where people have posted cores and peripherals that can be imported. I found those examples helpful to look at.